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Two sources familiar with the matter say Taiwan’s TSMC is exploring the possibility of building advanced packaging capacity in Japan, signaling support for Japan’s efforts to revitalize its semiconductor industry.
The deliberations are in the early stages, and sources decline to be identified due to the confidential nature of the information. One option TSMC considers is introducing its chip-on-wafer-on substrate (CoWoS) packaging technology to Japan.
CoWoS is a high-precision technology that involves stacking chips on each other, enhancing processing power while conserving space and reducing power consumption. Currently, all of TSMC’s CoWoS capacity is located in Taiwan.
According to one of the sources, no decisions regarding the scale or timeline for potential investment have been finalized. TSMC, also known as Taiwan Semiconductor Manufacturing Co, declined to comment.
The demand for advanced semiconductor packaging has risen globally, driven by the proliferation of artificial intelligence applications.
Chipmakers such as TSMC, Samsung Electronics, and Intel are ramping up capacity to meet this demand. TSMC’s Chief Executive C.C. Wei announced plans in January to double CoWos output this year, with further increases projected for 2025.
TSMC recently announced plans to expand advanced packaging capacity in Chiayi, southern Taiwan, in response to strong market demand.
Construction of a new CoWoS plant in Chiayi is set to commence in early May, according to Vice Premier Cheng Wen-tsan, as reported by the island’s official Central News Agency.
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